(1) Field of the Invention
The present invention relates to microprocessors. More specifically, the present invention relates to branch prediction in microprocessors.
(2) Background Information
Silicon process technology has lead to the development of increasingly larger die sizes for integrated circuits which are capable of including millions of transistors on a single die. Also advances in microprocessor computer architectures have provided architectures that use a larger number of bits than conventional computer architectures. In the following description, the word "architecture" refers to Instruction Set Architecture (ISA). For example, Intel microprocessors may be implemented with 32 bits, i.e., Intel Architecture 32 (IA-32) as well as with 64 bits, i.e., Intel Architecture 64 (IA-64). The IA-64 architecture provides full backward compatibility for executing existing code written for the IA-32 architecture. The execution of existing IA-32 code by a microprocessor that implements an IA-64 architecture may be accomplished in various ways, from software emulation to a full hardware implementation of an IA-32 machine on a chip that implements the IA-64 architecture, such that the IA-32 and the IA-64 may co-exist on the same clip. One advantage of having two architectures on the same chip is increased performance of both architectures while maintaining backward binary compatibility.
To utilize a microprocessor in a computer system, an operating system compatible with the microprocessor's architecture is developed. In addition to providing a compatible operating system, application programs compatible with the microprocessor's architecture are developed. For example, a large number of application programs compatible with Intel architectures are commercially available.
Assume that a user starts utilizing a more advanced microprocessor architecture. The user has a large customer base that had previously purchased software (application programs) compatible with the previous architecture. It is advantageous to integrate both IA-64 and IA-32 architectures on the same chip to allow customers endowed with old software to utilize a new processor (that integrates IA-32 and IA-64), select the IA-32 architecture when executing existing software and switch to the IA-64 architecture when utilizing new software. Integrating two microprocessor architectures on a same chip, however, needs to employ a relatively large area on the chip. It is desirable to integrate two microprocessor architectures on a same chip without having to utilize a relatively large area on the chip.